First Xenos image hits the web

[Reanimated]

Beyond3D (http://www.beyond3d.com/articles/xenos/images/c1.jpg) Has snagged a picture of the beast that will power the Xbox 360 - Xenos.

As our "ATI Xenos: XBOX 360 Graphics Demystified" article investigates, the graphics processor for the XBOX 360 console is split into two elements, the main parent "shader core" (manufactured by TSMC at 90nm) which handles most of the graphics operations and the ALU arrays for processing shader programs and a secondary, daughter die (manufactured by NEC at 90nm) which handles the all the sample operations (colour read/blend/write, Multi-Sample AA, Z operations, etc.) and a fast dedicated 10MB of eDRAM that acts as the processors primary frame buffer, that has 256GB/s of bandwidth available to it.Very shiny.

[Talanvor]

Neat. And the GPU on my 6800U is shiny too, once all the paste is removed, heh.

[Morratut]

Mmmm that chip is going to give me lots of fun in the future <drool> in a homer stylee!:p

[netcraazzy]

Does anybody know what that smaller die to the left is for? I looks like a bigger and a smaller core on the same chip, what's up with that?

[bapenguin]

Does anybody know what that smaller die to the left is for? I looks like a bigger and a smaller core on the same chip, what's up with that?

maybe the 10 meg edRam?

[Reanimated]

Yes, that's the daughter die that contains the EDRAM.

You can just call it "4xAA for free".

[Zanzibar]

Heh. They've got the old Xbox 1 logo on it.

[Liquidize105]

What's so cool about looking at a core?

[noxa]

What's so cool about looking at a core?

To some of us, this is better than porn ;)

[bumgut]

After a thorough analysis of that picture, I have concluded that 360 will be able to render 'Batman Begins' in real time.

[EGO]

it would be nice to have something to use for reference...

a quarter, a finger, something...

[Draft]

it would be nice to have something to use for reference...

a quarter, a finger, something...It's 100x the size of the Beyond3D logo.

[chechenepiphany]

Just eyeballing it, I would guess its about the size of a socket A processor. Maybe smaller.

[mister_slim]

Very nifty.

[bobbler]

EGO,

Depending on how tightly packed it all is and how many layers(?) (90 nm: ~230m transistors for main die and ~100m for edram + blenders), it could take between 250-350mm^2 -- sorry for such a large gap, but 100mm^2 isn't all that big and there are a lot of factors (I'm no expert also). A quarter is about 450mm^2. It could quite comfortably fit under a quarter (both the dice) -- maybe even a nickel (around ~325mm^2).

[Zeal]

Maybe even a nickel (around ~325mm^2).

No, not a nickle.

[net7runner]

No, not a nickle.

Or a quarter, or anything that size. Like somone else said, it looks to be about the same size as an old AMD socket A processor, maybe a little smaller (those were about ~3.5 cm on a side).

[bobbler]

The die(dice), as I said, will fit under a quarter nicely (with some extra room to breathe) -- the chip wouldn't be very practical for mass production if it was bigger. The entire package is bigger (obviously), but I wasn't talking about that.

It might be able to fit under a nickel, depending on a few different things -- a nickel is still quite big in comparison to most chips -- hell the P4/Athlon64s on 90nm are between 80-150mm^2 if you really want a comparison in size (they also have like half the transistor count).

[chechenepiphany]

yeah, somehow i don't think it'd be smaller than a quarter. There's no incentive to go that small, and besides at the size of an old socket A cpu, the cooling guys already have tehir work cut out for them.

[NACIONAL]

There's no incentive to go that small,.

yes, there is. COST. The chips are putted ina round waffle... maximizin size of the waffle is minimizing costs...

Damn.. i have to learn more english.

[bobbler]

Most dice are smaller than a dime.

In the chip world a 300mm^2 chip is colossul -- I can't think of a mass produced chip that has gotten near that (the 6800's die was around 224mm^2 and that is still huge). A quarter is 452mm^2. So yes, the actual part that is doing all the pretty graphics is very much smaller than a quarter. There is a huge incentive to go smaller than a quarter -- there is something (the big something when producing a chip) that is called yields. The smaller the chip is the less likely for a defect to happen (you're likely to have x amount of defects per square mm, lets say), and the more dice per wafer you can have -- reducing the cost greatly. There are chips out there that are bigger, but they aren't going to be producing 50+million of them (Itaniums are the only ones I can think of offhand that are patently bigger -- they aren't anywhere near being mass produced)

That headspreader on the P4s and A64s is hiding a very tiny die underneath -- the only reason the package is bigger is because you can't feasibly fit all the pins you need under the tiny die so they have to expand it (775/939 pins under a die smaller than a dime isn't possible if you want to have any sort of durability). The 512kb cache 90nm A64s (winchester/venice) is only 84mm^2 -- a dime is somewhere around 150mm^2.

[chechenepiphany]

I was reffering to the size of the entire chip, not the die. I'd be pretty shocked if the die wasn't smaller than a quarter. But why would a smaller chip mean less defects? If you make the chip smaller, the rate of defects per area would go up, no?

[bobbler]

Well, with static complexity a chip with 300million transistors (and thus a pretty big die size) is going to have a lot more defects (on average) than a chip with 150million transistors (and a die size roughly half that of the first die). Since you can pretty much gaurantee a certain amount of defects per square area of the wafer (more correctly would be per millions of transistors, probably -- however on a static process throughout the wafer (which it would need to be) you can average it to be per square mm of the wafer), each bigger die will have a larger chance to be hit by one. There will be overall the same amount of defects (if my understanding of the whole process is correct), but you'll end up throwing away more larger chips than you will smaller chips (depending on the severity of the defect).

Say you have 1 defect per square cm on average. If you have a large core and it happens to be 1cm^2 in size, you'll be throwing a lot of those dies away; if you have a chip that is 5mm^2 you'll be getting quite a few of them without defects (on average) since you can fit quite a few of them within the 1cm square. This of course is comparing two different dies on the same fab process (90nm for example), if one chip is 130nm and one chip is 90nm, that changes things a bit (since there is more transistors per square mm on the 90nm chip it has a higher chance to have a defect than a 130nm chip -- however, the 130nm will be roughly twice the size, so depending on the situation it could be in a better situation or a worse situation -- most likely worse).

Maybe BloodAngel can throw in his input? I'm stepping into fudgy parts for me, he would probably (I would hope so, at least =o) know better.

[bapenguin]

yes, there is. COST. The chips are putted ina round waffle... maximizin size of the waffle is minimizing costs...

Damn.. i have to learn more english.

I believe the word you are looking for is wafer, not waffle. A waffle is a breakfast food.

[bobbler]

A waffle is a breakfast food.

A delicious one though!

[NACIONAL]

I believe the word you are looking for is wafer, not waffle. A waffle is a breakfast food.

thanks..... and yes.. it´s a very delicious food...